
In recent years issues caused by unexpected power bus noise have increased and it is becoming more difficult to design PCB without operational failure. It is important to resolve these issues in the early design stage in order to reduce power bus noise. PDNDesigner can effectively reduce power bus noise by taking into account the board, capacitors, chip and package at the initial design phase.

With conventional analysis methods, you were only able to analyze in the final stage of PCB design or post PCB design completion. PDNDesigner can be used at pre-layout stage to optimize capacitors including capacitance and quantity. Since PDNDesigner can help you eliminate possible PI issues at early design stage it will decrease redesign work and enable faster time-to-market.
Analysis time is only 1 second for 1 analysis and 100 times faster than conventional SPICE engine.
Analysis tools which use PCB layout design may require considerable time. For example, several days to 1 week for set up, several days to 1 week for analysis, several days to several weeks creating reports. Hence, it requires engineers solely dedicated to simulation and analysis. On the other hand, PDNDesigner is a very efficient tool that is user friendly and easy to learn. From set up to analysis it will only take up to several hours, you can even perform a comprehensive analysis in a day including creating reports.

PDNDesigner, can be used to optimize capacitors including capacitance and quantity to meet your specific design guide lines and needs. PDNDesigner helps better understand characteristics and effects of capacitors allowing even novice design engineers to easily improve power integrity. You do not have to be a PI expert, PDNDesigner will help you become one. While maintaining power integrity, you can reduce capacitors and not only save cost but also improve design.
We were able to decrease the number of capacitors while keeping power integrity by using PDNDesigner at early design stage.
The great benefit of PDNDesigner is that it is not based on experience but analytical simulation .You can also use PDNDeisgner as an educational tool to teach junior engineers.
You can clearly see what the noise causing factors are using PDNDesigner, be it the board, IC, or capacitor so you can easily find solutions. Due to its amazingly fast analysis speed, PDNDesigner gives busy engineers like us time to look closer into the designs.
In trying out exotic material such as unique capacitors or Buried Capacitance material, you can use PDNDesigner to simulate its advantages. It will allow you to weigh cost and effect in implementing new material.
We would like to beat competition with strength in power integrity analysis using PDNDesigner.
We were able to see majority of power bus noise prior to building the PCB.

・PDNDesigner can be used at pre-layout stage to optimize capacitors including capacitance and quantity.
・Calculate capacitor mounting ratio to consider the number of capacitors that can be placed on the PCB.
・Automatic optimization
When capacitors are mounted on the PCB, pin, pad and trace (based on capacitor location) inductance occurs. PDNDesigner can calculate the interconnect inductance enabling more practical PDN analysis.


・Plane size
・Plane model (GV,GVG)
・S-parameter model from IC specification
・Frequency dependent resistance with skin effect and dielectric loss
・Take any combination of capacitors, chip/package and plane effect into account for simulation
・Easily Turn IC Package or Board Model On or Off.
・Easily compare different impedance curve in order to choose optimal combination.

