Draw complex power plane shapes to fit your design. Place components such as IC, VRM and via on the plane you have created for PDN floor planning.

IR-Drop feature calculates voltage drop from VRM (From power supply source) to IC caused by DC current and resistance of power plane. IR drop can cause IC malfunction, therefore it is essential to make sure the voltage drop is within IC specification.

It is important to consider IR drop countermeasures including width and length of the power plane and copper thickness at pre-layout stage. Countermeasures against IR drop are also effective from thermal management perspective since power consumed by IR drop will translate to heat.

Analyze input impedance for target IC. You can make sure that the input impedance falls below the target impedance (red line in the figure) to ensure stable IC operation.

Transfer impedance is displayed in color gradation. Where there is high transfer impedance (shown in red) lack of current flow exists. If the IC is located in the area with high transfer impedance, you should look at input impedance as well in order that current is supplied properly to the IC. High transfer impedance can also increase EMI.

Transfer impedance is displayed in color gradation. Where there is high transfer impedance (shown in red) lack of current flow exists. If the IC is located in the area with high transfer impedance, you should look at input impedance as well in order that current is supplied properly to the IC. High transfer impedance can also increase EMI.

You can export the analysis result as Excel to review each scenario conditions as well as the impedance profile.

Perform simulation to see either power plane or power trace is optimal for power distribution. The type, quantity and location of the capacitors will remain the same. Results are shown below.

Power trace (in red) is more optimal in terms of meeting target impedance. The impedance of the power trace fell below target impedance since the anti-resonance caused by capacitors and the power trace shifted to higher frequency. However, power bus noise increases at higher frequency.

You can decide either to use power plane or power trace depending on the frequency components of the IC you will be using. Generally speaking, power trace reduces EMI so you need to consider both power integrity and EMI to make your decision.

Power bus noise from electronics devices can be suppressed with power noise filters. In this case filters were placed between different power plane islands.

The result shows power bus noise is suppressed and the filter performs effectively at the lower impedance (OK) area while at higher impedance area power bus noise transmitted across the plane (NG). You can run simulation with filters to see how effective they are and select optimal filters for different ICs.